add lab1 and lab2 exercises

This commit is contained in:
Mariano Sciacco
2021-11-19 10:36:17 +01:00
parent 4d2c26287f
commit 15e2cad2c9
12 changed files with 511 additions and 2 deletions

28
lab1/delay_inverter.smv Normal file
View File

@@ -0,0 +1,28 @@
MODULE delay(input)
-- Model of the delay component
VAR
x : boolean;
ASSIGN
init(x) := FALSE;
next(x) := input;
DEFINE
out := x;
MODULE relay(input)
-- Model of the relay
DEFINE
out := input;
MODULE inverter(input)
-- Model of the inverter
DEFINE
out := !input;
MODULE main
-- Composition of delay and inverter
VAR
del : delay(inv.out);
inv : inverter(del.out);
INVARSPEC inv.out = !del.out;